claude_projs
Project index

claude_projs

This site documents work to push forward what is possible in the field of PCB design using the latest AI tools and automation scripting. Every project has at its core an AI agent writing and running code, driving real EDA tools directly: Cadence OrCAD Schematic Capture and PCB Designer (Allegro), and LTspice, the software used to design and verify circuits through simulation. The goal is to advance the state of the art in AI automation, one working project at a time.

Each entry is a real, running project with a link to its repository.

Entries
004
Field
Circuit & PCB design automation
Built with
Claude Code
Source
github.com/daveyJ-sgs
Latest3D render — from the live Allegro database

The PP1 design

A moving-coil phono preamplifier, designed by Dave and Claude and laid out in Allegro through the Cadence bridge.

Board
PP1 phono preamplifier
Stackup
4 layers — signal / GND / PWR / signal
Size
8.000 × 3.000 in
Parts
57 placements, 25 line items
Revision
Board v1.8 — fab package v1.9
See all fifteen renders
01Projects

What’s in here

P-001Active

Cadence Design Automation

AI agent control of Cadence OrCAD Schematic Capture and Allegro PCB Editor over a live database bridge — real reads and writes, not screenshots or GUI scripting.

PythonCadenceOrCADAllegroMCPSKILLTCL
Read the writeup
3D render of the assembled PP1 phono preamplifier board, viewed from a low three-quarter angle: a black four-layer PCB with a grey mains transformer at the left end, blue electrolytic capacitors, red film capacitors around the op-amp stages, and four RCA jacks at the right end.
P-002Active

LTspice Agent Automation

A Python-controlled LTspice simulation, analysis, and automation toolkit for agent-driven electronics workflows — CLI, REST API, and an MCP server.

PythonLTspiceSPICEMCPREST APISQLite
Read the writeup
Bode magnitude plot of the Sallen-Key low-pass filter from 10 Hz to 100 kHz, showing a flat passband near 7.96 dB, a resonant peak of 14.26 dB at 933 Hz, and a roll-off of 40 dB per decade above it.
P-003Simulation candidate

Portable 100 MHz DAQ

Two channels, 400 MS/s each, and a reproducible analog design study that shows the passing results and the failures that shaped it.

DAQ100 MHzUSB-CLTspiceFPGAAnalog design
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Two analog channels feed a dual ADC3649, FPGA and DDR3 memory, then an FX20 USB-C interface. The diagram labels the architecture as a candidate awaiting hardware qualification.
P-004Active

TM4C123G LaunchPad DAQ

12-bit data acquisition firmware for an inexpensive TI LaunchPad, streaming to a Python GUI over USB CDC — a working microcontroller project, not the discrete analog front-end instrument design study elsewhere on this site. Includes an edge-triggered burst capture mode, and a USB throughput investigation that reversed its own first diagnosis.

CTivaWareTM4C123GUSB CDCuDMAPythonPySide6
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4 entries so far. More get added as they get finished.